1. Field of the Invention
The present invention relates to a semiconductor integrated circuit interconnect structure and method for fabricating an interconnect structure having enhanced performance and reliability, by utilizing a graphene-based barrier metal layer to block oxygen intrusion from a dielectric layer into the interconnect structure and block copper diffusion from the interconnect structure into the dielectric layer.
2. Description of the Related Art
Semiconductor devices include a plurality of circuit components (i.e., transistors, resistors, diodes, capacitors, etc.) connected together to form an integrated circuit fabricated on a semiconductor substrate. A complex network of semiconductor integrated circuit interconnects (interconnects) are routed to connect the circuit components distributed on the surface of the substrate. Efficient routing of these interconnects, across semiconductor devices, requires formation of multi-level or multi-layered patterning schemes, such as single or dual damascene interconnect structures.
An interconnect structure includes metal vias that run perpendicular to the semiconductor substrate. The metal vias are disposed in trench areas. In addition, an interconnect structure includes metal lines that are disposed in the trench areas, wherein the trench areas are formed in a dielectric layer. The metal vias are connected to the metal lines, and the metal lines run parallel to the semiconductor substrate. Thus, both the metal lines and metal vias are on and adjacent to the dielectric layer having a dielectric constant (k) ranging from about 1.0 to about 3.0, which reduces parasitic capacitance and thereby allows faster signal speed and less signal crosstalk (i.e., crosstalk refers to a signal being transmitted through a metal line, and affecting another signal being transmitted through a separate metal line, and/or affecting other parts of circuitry in an undesired manner).
Furthermore, an interconnect structure that is copper-based, when compared with an aluminum based interconnect structure, provides higher speed signal transmission between large numbers of transistors on a complex semiconductor chip. Accordingly, when manufacturing integrated circuits, copper (i.e., a metal conductor) is typically used for forming the semiconductor integrated circuit's interconnects, because of copper's low resistivity and high current carrying capacity. Resistivity is the measure of how much a material opposes electric current, due to a voltage being placed across the material. However, when copper is utilized to form interconnects, electromigration may occur.
Electromigration is the gradual displacement of atoms within a metal conductor due to high density of current passing through the metal conductor, and electromigration is accelerated when the temperature of the metal conductor increases. In addition, electromigration can occur when there is gradual displacement of atoms within a metal conductor of an interconnect structure, wherein the atoms diffuse across a barrier metal layer of the interconnect structure into a dielectric layer that structurally supports the interconnect structure. Electromigration can result in void formation as well as extrusion/hillock formation along regions of an interconnect structure. The voids can result in an open circuit if one or more voids formed are large enough to sever the interconnect structure, and the extrusions/hillocks can result in a short circuit if one or more extrusions/hillocks are sufficiently long to form a region of abnormally low electrical impedance.
In addition, if an interconnect structure is copper-based then oxygen intrusion, from moisture in a dielectric layer that structurally supports the interconnect structure, into copper areas of the interconnect structure can reduce the performance of the interconnect structure. Specifically, oxygen that intrudes a seed layer and/or an electroplated copper layer of the interconnect structure can increase the resistivity of the interconnect structure. If the resistivity of the interconnect structure increases then ion mobility decreases, which translates to reduced current flow through the interconnect structure. Failure to adequately block oxygen intrusion into the interconnect structure and block copper diffusion into the dielectric layer can result in a reduction of performance and electromigration reliability of the interconnect structure, a reduction in the useful life of semiconductor integrated circuit products, and even sudden data loss.
Currently, tantalum or tantalum nitride is the material typically utilized to form a barrier metal layer of an interconnect structure. As the size of semiconductor devices become smaller a challenge arises of forming the interconnect structure having a barrier metal layer that includes mainly tantalum or tantalum nitride, because the tantalum and tantalum nitride will occupy too much volume of the interconnect structure and leave less volume available for copper deposition as part of the interconnect structure. For example, a tantalum or tantalum nitride barrier metal layer is often deposited, utilizing physical vapor deposition (PVD) techniques, to a thickness ranging from about 5 nm to about 10 nm in order to achieve the desired characteristics of blocking oxygen intrusion into the interconnect structure and blocking copper diffusion into the dielectric layer. A tantalum or tantalum nitride barrier metal layer having a thickness ranging from about 5 nm to about 10 nm consumes too much volume of the interconnect structure, and causes the interconnect structure to have high resistivity. However, it is desirable to have a thin barrier metal layer and more volume of the interconnect structure available for copper, instead of tantalum or tantalum nitride, in order to reduce electrical resistivity and resistive-capacitive delay of signal propagation through the interconnect structure.